Rapid advancements in multi-core and chip-level multi-threading technologies open new challenges and make multi-core systems a part of the computing landscape. From high-end servers to mobile phones and Personal Digital Assistants (PDAs) multi-core is steadily entering every single aspect of the information technology. Intel- and AMD-based 8 and 16 core systems are not things of the future, but reality of mid- and high-end servers today (with 2 and 4 CPU motherboards respectively). UltraSPARC T2 CPU offers 8 cores on a single chip with 8-way hardware multi-threading on each core, resulting in a massive 64-way system with
two 10GB/s network interfaces on a single silicone die. Pervasive use of CPU chips with excess of 64 cores is soon to be a reality.

To fully utilise multi-core environments a transition from sequential programming models towards distributed and parallel programming techniques is necessary. Techniques from distributed grids are making their way into the new multi-core developers toolsets. Many of the techniques used for grid programming are also being used to build and deploy a Grid-on-a-Chip systems. In other words, distributed and grid programming are merging with multi-core technologies. In not distant future one will execute a traditional distributed applications on a single chip. Apart obvious similarities, there are also fundamental differences, between multi-core and grid technologies. Multi-core systems rely on true Shared Memory rather than distributed memory systems, where latencies are measured in micro- and nanoseconds instead of milliseconds.

This workshop is dedicated primarily to identify and address the main challenges in the newly emerging multi-core software engineering and distributed programming paradigm. This workshop will provide a discussion forum and cross-fertilisation of multi-core technology with well established grid and distributed programming paradigms.

The program committee cordially invites any novel research ideas in the following range of subjects:

• multi-core programming models
• performance and utilisation metrics
• performance analysis, efficiency and effectiveness
• multi-core software engineering
• convergence of grid and multi-core programming paradigms
• multi-core: similarities and usefulness of shared memory and distributed memory models
• message passing and applicability of known and established distributed programming models to multi-core systems
• massively multi-core systems: the challenges and other topics directly related to multi-core technology and grid computing

Authors are invited to submit original papers not previously published nor submitted in parallel to any other publication for conference, workshop or journal. Papers should be up to 8 pages long, double column and follow the IEEE manuscript guidelines provided by CCGrid2008 web site. Submission implies the willingness of at least one of the authors to register and present the paper. Authors must register and submit their paper through the online submission system. If you have problems accessing the system, e-mail your submission to mariusz at nowostawski.org.

Workshop Organizers

Mariusz Nowostawski, Information Science Department, University of Otago and World45, mariusz at nowostawski.org

Ariel Hendel, Distinguished Engineer, Sun Microsystems, USA, ariel.hendel@sun.com

Prof. WeiMin Zheng, Institute of High Performance Computing, Department of Computer Science and Technology, Tsinghua University, China, zwmdcs at tsinghua.edu.cn