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Programming Parallel Applications for Multi-cores (PPAM) 2008 |
IntroductionRapid
advancements in multi-core and chip-level multi-threading technologies
open new challenges and make multi-core systems a part of the computing
landscape. From high-end servers to mobile phones and Personal Digital
Assistants (PDAs) multi-cores are steadily entering every single aspect
of the information technology. Intel- and AMD-based 8 and 16 core
systems are not things of the future, but reality of mid- and high-end
servers today. Dual-chip UltraSPARC
T2.2 CPU offers 2x8 cores with 2x8x8-way hardware multi-threading
on each core, resulting in a massive 128-way system with
two 10GB/s network interfaces on a single silicone die. Pervasive
use of CPU chips with excess of 64 cores is soon to be a reality.
To fully utilise multi-core environments a transition
from sequential programming models towards parallel
programming techniques is necessary. Techniques from distributed
and parallel processing are making their way into the new multi-core developers toolsets.
Many of the techniques used traditionally for parallel programming are also being
used now on multi-cores. Apart obvious similarities, there
are also fundamental differences, between multi-core and grid technologies.
Multi-core systems rely on true Shared Memory rather than distributed
memory systems, where latencies are measured in micro- and nanoseconds
instead of milliseconds.
This workshop is dedicated primarily to gather researchers and practitioners addressing the
main challenges in the newly emerging multi-core software engineering
and distributed programming paradigm. This workshop aims to provide
a discussion forum for people interested in programming environments and models
specifically designed for parallel multi-core hardware environments.
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Topics of interest
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The program committee cordially invites any novel research ideas
in the following range of subjects:
- multi-core programming models
- multi-core software engineering
- performance and utilisation metrics
- performance analysis, efficiency and effectiveness
- multi-cores: similarities and usefulness of shared memory and
distributed memory models
- message passing and applicability of known and established distributed
programming models to multi-core systems
- massively multi-core systems: the challenges and opportunities
- automated parallelisation of existing code
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Submission Details
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Authors are invited to submit original papers not previously published nor submitted in parallel to any other publication for conference, workshop or journal. Papers should be up to 8 pages long, double column and follow the IEEE manuscript guidelines provided by PDCAT2008 web site. Submission implies the willingness of at least one of the authors to register and present the paper.
Authors must register and submit their paper through the online submission system.
If you have problems accessing the system, e-mail your submission to mariusz at nowostawski.org.
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Registration
Information about registration at PDCAT 2008 main website. |
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Workshop
Organizers (tentative list)
Mariusz Nowostawski, Information Science Department,
University of Otago and World45, mariusz at nowostawski.org
Ariel Hendel, Distinguished Engineer, Sun Microsystems,
USA, ariel.hendel at sun.com
Prof. WeiMin Zheng, Institute of High Performance
Computing, Department of Computer Science and Technology, Tsinghua
University, China, zwmdcs at tsinghua.edu.cn
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Technical
Program Committee(tentative list)
- Martin Purvis - Prof, University of Otago, Dunedin, New Zealand
- WeiMin Zheng - Prof, Tsinghua University, China
- Wenguang Chen - Prof, Tsinghua University, China
- Ariel Hendel - Dist. Eng., Sun Microsystems, Santa Clara, USA
- Noria Foukia - Dr, University of Otago, Dunedin, New Zealand
- Javier Iparraquirre - Ventania Labs, USA/Argentina
- Dariusz Krol - Dr, University of Technology, Wroclaw, Poland
- Mariusz Nowostawski - Lecturer, University of Otago/CTO W45, Dunedin, New Zealand
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| Important dates
Paper submission deadline : August 15, 2008 (EXTENDED)
Notification of acceptance : August 24, 2008
Camera-ready papers due : September 1, 2008
Registration deadline : September 28, 2008
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